
PIC18F6585/8585/6680/8680
DS30491C-page 312
2004 Microchip Technology Inc.
REGISTER 23-49: MSEL1: MASK SELECT REGISTER 1(1)
R/W-0
R/W-1
R/W-0
R/W-1
FIL7_1
FIL7_0
FIL6_1
FIL6_0
FIL5_1
FIL5_0
FIL4_1
FIL4_0
bit 7
bit 0
bit 7-6
FIL7_1:FIL7_0: Filter 7 Select bits 1 and 0
11
= No mask
10
= Filter 15
01
= Acceptance Mask 1
00
= Acceptance Mask 0
bit 5-4
FIL6_1:FIL6_0: Filter 6 Select bits 1 and 0
11
= No mask
10
= Filter 15
01
= Acceptance Mask 1
00
= Acceptance Mask 0
bit 3-2
FIL5_1:FIL5_0: Filter 5 Select bits 1 and 0
11
= No mask
10
= Filter 15
01
= Acceptance Mask 1
00
= Acceptance Mask 0
bit 1-0
FIL4_1:FIL4_0: Filter 4 Select bits 1 and 0
11
= No mask
10
= Filter 15
01
= Acceptance Mask 1
00
= Acceptance Mask 0
Note 1: This register is available in Mode 1 and 2 only.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown